(A Centre for Excellence established by Ministry of Human Resource Development, Government of India)

Dr Noor Mahammad Sk

Assistant Professor of Computer Science



Indian Institute of Information Technology
Design & Manufacturing (IIITD&M) Kancheepuram,
Melakottaiyur Village
Off Vandalur-Kelambakkam Road
Chennai-600048, INDIA

+91-44-2747 6349



noor@iiitdm.ac.in		  
   
Research Interest    
  1. Software for VLSI Design
2. Evolvable Hardware
3. Reconfigurable Computing
4. Network-on-Chip (NoC)
5. Software Defined Radio
     
Education    
  PhD from Indian Institute of Technology Madras
M. Tech from National Institute of Electronics and Information Technology (NIELIT) Aurangabad.
B.Tech from Sri Venkateswara University, Tirupati.
     
Professional Experience    
 

Teaching 5 years.
Research 4 years and 5 months
     
Areas of Expertise    
  VLSI Design    
     
Courses Handled for UG    
 
    1. Interfacing Through Microprocessors
    2. VLSI Design
    3. Computer Organization
    4. Digital Logic Design
    5. Computer Networks
    
     
Courses Handled for PG    
 
    1. CPLD and FPGA Architectures and Applications
    2. Modeling and Synthesis of Verilog HDLs
    3. ASIC Design
    4. Advanced Computer Architecture
    5. Scripting Languages for VLSI Design Automation
    6. Digital Signal Processing and Processors
    
     
Most recently published papers    
2011    
 
Mohammed Shoaib, Noor Mahammad Sk and V Kamakoti, “Hardware Based Genetic Evolution of Self-Adaptive Arbitrary Response FIR Filter”, in the proceedings of Inter-national Journal of Applied Soft Computing, Vol. 11, No. 1, pp. 842-854, January 2011
2010    
 
Sk Noor Mahammad and V Kamakoti, “Constructing Online Testable Circuits using Reversible Logic”, in the proceedings of IEEE Transactions on Instrumentation and Measurements, Vol. 59, No.1, pp. 101-109, January 2010
     
2008    
 

Karthik K S, Shyam S, Ramasubramanian N, Shoaib M, Noor Mahammad Sk and Kamakoti V, “A SEU Tolerant CLB RAM for In-Circuit Reconfiguration”, in the proceedings of the 12Th IEEE International VLSI Design and Test Symposium (VDAT' 08), pp. 228-238, Bangalore, India, July 2008.
     
2007    
 
Mohammed Shoaib, Noor Mahammad Sk and Kamakoti V, “A Genetic Approach to Gateless Custom VLSI Design Flow”, in the proceedings of 19Th IEEE International Conference on Microelctronics, pp XII-XVIII, Cairo, Egypt, December 2007.
     
2006    
 

1. Hari Siva Kumar Sastry, Shyam Shroff, Noor Mahammad Sk and Kamakoti V, “Efficient Building Blocks for Reversible Sequential Circuit Design”, in the proceedings of the 49Th IEEE International Midwest Symposium on Circuits and Systems, (MWSCAS'06), pp 437-441, August 2006.
2. Noor Mahammad Sk, Siva Kumar Sastry H, Shyam Shroff and Kamakoti V, “Constructing Online Testable Circuits using Reversible Logic”, in the proceedings of 10Th IEEE International VLSI Design and Test Symposium (VDAT 2006), pp 373-383, Goa, India, August 2006.
     
2005    
 
Noor Mahammad Sk, Chandrasekhar V, Muralidaran V, Kamakoti V and Vijaykrishnan N, “ Reduced Triple Modular Redundancy for Tolerating SEUs in SRAM-based FPGAs”, in the proceedings of the 8Th annual MAPLD International Conference on Programmable Logic Devices and Technologies, paper no. 204, Washington D.C., USA.  September 2005. Organized by NASA, USA.
     
Memberships in professional societies    
 

VSI – VLSI Society of India
     
Other details:    
  Tutorials Developed:
ASIC Design Flow: Prepared an interactive ASIC Design Flow tutorial with an example using Magma ASIC Design for synthesis of RTL to GDS-II format.

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