Dr Noor Mahammad Sk
Visiting Assistant Professor of Computer Science


IIITD&M Kancheepuram
IIT Madras Campus
Chennai 600 036
India


+91-44-2257 8555 Ext - 25


noor@iiitdm.ac.in		  
   
Research Interest    
  1.  Software for VLSI Design
2.  Evolvable Hardware
3.  Reconfigurable Computing
4.  Network-on-Chip (NoC)
5.  Software Defined Radio
     
Education    
  Ph D - IIT Madras
     
Professional Experience    
  1. Teaching 3 years.
2. Research 4 years and 5 months
     
Areas of expertise    
  VLSI Design    
     
Most recently published papers    
2008      
 

Karthik K S, Shyam S, Ramasubramanian N, Shoaib M, Noor Mahammad Sk and Kamakoti V, "A SEU Tolerant CLB RAM for In-Circuit Reconfiguration", in the proceedings of the 12Th IEEE International VLSI Design and Test Symposium (VDAT' 08), pp. 228-238, Bangalore, India, July 2008.
       
2007      
 
Mohammed Shoaib, Noor Mahammad Sk and Kamakoti V, " A Genetic Approach to Gateless Custom VLSI Design Flow", in the proceedings of 19Th IEEE International Conference on Microelctronics, pp XII-XVIII, Cairo, Egypt, December 2007.
     
2006    
 
1. Hari Siva Kumar Sastry, Shyam Shroff, Noor Mahammad Sk and Kamakoti V, "Efficient Building Blocks for Reversible Sequential Circuit Design", in the proceedings of the 49Th IEEE International Midwest Symposium on Circuits and Systems, (MWSCAS'06), pp 437-441, August 2006.

2. Noor Mahammad Sk, Siva Kumar Sastry H, Shyam Shroff and Kamakoti V, " Constructing Online Testable Circuits using Reversible Logic", in the proceedings of 10Th IEEE International VLSI Design and Test Symposium (VDAT 2006), pp 373-383, Goa, India, August 2006.
2005
Noor Mahammad Sk, Chandrasekhar V, Muralidaran V, Kamakoti V and Vijaykrishnan N, " Reduced Triple Modular Redundancy for Tolerating SEUs in SRAM-based FPGAs", in the proceedings of the 8Th annual MAPLD International Conference on Programmable Logic Devices and Technologies, paper no. 204, Washington D.C., USA.  September 2005. Organized by NASA, USA.
     
To be appeared    
2010
 
1. Mohammed Shoaib, Noor Mahammad Sk and V Kamakoti, "Hardware Based Genetic Evolution of Self-Adaptive Arbitrary Response FIR Filter", in International Journal of Applied Soft Computing, http://dx.doi.org/10.1016/j.asoc.2010.01.004.

2. Noor Mahammad Sk and V Kamakoti, "Constructing Online Testable Circuits using Reversible Logic", to be appear in IEEE Transactions on Instrumentation and Measurements.
     
Communicated    
 

Noor Mahammad Sk and V Kamakoti, "Reduced Triple Modular Redundancy for Mitigating Single Event Upsets (SEUs) in SRAM based FPGAs", communicated to Journal of IETE.
     
Other details    
 

Tutorials Developed:

  • ASIC Design Flow:  Prepared an interactive ASIC Design Flow tutorial with an example using Magma ASIC Design for synthesis of RTL to GDS-II format.

Professional Activities:

  • Conducted a three day workshop on PLD Design Flow: A Practical Approach for B. Tech students at Sree Vidyanikethan Engineering College, Tirupati, from 16Th Feb, 2010 to 18Th Feb, 2010.

Courses Taught:

UG Courses:

    • Interfacing Through Microprocessors
    • VLSI Design
    • Computer Organization
PG Courses:
    • CPLD and FPGA Architectures and Applications
    • Modeling and Synthesis of Verilog HDLs
    • ASIC Design
    • Advanced Computer Architecture
    • Scripting Languages for VLSI Design Automation



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